The panelization design determines how much material waste for each panel. Depanelization is sometimes more important, as it dictates edges. Not leaving enough board edge clearance will necessitate a design change to ensure that a board can be depanelized.Engineers and PCBA designers used to routinely create designs for their boards without knowing who would be building them or what equipment and processes they utilized. This black box process where the designer was locked out of manufacturing and the CM was completely absent from the design process was inefficient. It often resulted in extended delays for an accurate quote, long turnaround times and bring-up, and often additional unnecessary costs.
Fortunately, spearheaded by leading CMs in the PCBA manufacturing industry, a white box approach was enacted. This approach, where the importance of DFM and DFA is incorporated, has mostly replaced the older model for board development. Unfortunately, the development process can still be delayed by not utilizing DFM effectively or other PCB layout mistakes. These common errors can be avoided with an adequate understanding of how they affect the manufacturing stages of PCBA development.
How to Eliminate PCB Layout Mistakes from a Design
For any board design except the simplest, the PCBA development process requires iterations to achieve the necessary design quality for bring-up and transition to low or high-volume production. The efficiency of this design⇒build⇒test or DBT cyclic process depends on the speed of the manufacturing process, which in turn relies on the absence of common PCB layout mistakes, as listed below, that can delay or even halt fabrication and assembly.
|COMMON PCB LAYOUT MISTAKES AND PREVENTIONS|
|1||Selecting unavailable component(s)||PCBA development begins with component selection and cannot proceed without all available elements. Therefore, establishing a secure and reliable supply chain, even with unforeseeable disruptive events, is essential.|
|2||Footprint mismatch||With the many packages available for most components, the BOM and layout footprint sometimes disagree. However, this oversight will delay your board’s manufacturing as will neglecting other good footprint pad layout guidelines.|
|3||Not following creepage and clearance guidelines||Creepage and clearance distances are important and guidelines are given in IPC standards—including IPC 2221. Not following these guidelines may result in shorts, arc tracking, and component and board damage.|
|4||Choosing drill sizes for vias that violate aspect ratio limits||Vias are an essential design element for multilayer PCBAs. However, drill hole sizes and depth are limited by aspect ratios based on the type of drill used. Selecting sizes that violate these restrictions will require a design change to ensure manufacturability.|
|5||Using mismatched copper thicknesses on the same layer||PCB layers are constructed using copper sheets of uniform thickness and roughness. If traces of different copper thicknesses are needed, then additional layers should be added to route those paths.|
|6||Omitting silkscreen reference indicators||Omitting silkscreen items, such as reference numbers for components, is a neglectful practice. PCBA silkscreen items such as polarity and pin 1 indicators inform how components should be placed and connected, and test point locations are critical for board performance verification.|
|7||Failing to consider panelization and depanelization||The panelization design determines how much material waste for each panel. Depanelization is sometimes more important, as it dictates edges. Not leaving enough board edge clearance will necessitate a design change to ensure that a board can be depanelized.|
|8||Straining tolerance limits||Although it may not prevent a board from being built, choosing specifications close to the range limit will likely result in low yield rates, unusable boards, extended turnaround times and additional costs. Strive to select specifications well within PCB tolerance limits, preferably at the center to avoid such outcomes.|
|9||Overspecification||It may be tempting to make selections that are not critical to board performance or design intent when designing a board. These may result in challenges for manufacturing that are avoidable. A better solution is to only spec out what is important and let the CM define the rest to build the board.|
5 Common Mistakes for High-Speed Board Builds
The list above is not exhaustive, and different board designs require special considerations to prevent running into common errors for that specific board type. However, the PCB layout mistakes highlighted in the table should be avoided for all designs. The PCBA development process is most efficient when the designer and CM are in collaboration. When open and transparent, this relationship enables the designer to incorporate the CM’s processes and equipment constraints during design and promotes the proliferation of the design intent throughout development. As shown in the table above, that relationship can significantly minimize the possibility that PCB layout mistakes will be made.
|Tempo's Custom PCB Manufacturing Service
A PCB layout is one of the critical design aspects that a CM relies on to build boards. However, it must match other design information and data and fall within the CM’s equipment capabilities. Tempo Automation, the industry leader in fast, high-quality PCBA prototyping and low-volume production, understands the importance of collaboration, and they work together with partners from day 1 of design to optimize the PCBA development process.
Tempo furnishes information for DFM checks to get started on the best path, enabling the easy viewing and downloading of DRC files. Altium Designer or Cadence Allegro users can simply add these files to PCB design software. For Mentor Pads or other design packages, Tempo furnishes DRC information in other CAD formats and Excel.
Ready to have your design manufactured? Try the quote tool to upload CAD and BOM files. For more information on common PCB layout mistakes and how to avoid them, contact Tempo.